The invention, related to co-pending application Ser. No. 653,541, filed 24 September 1985 by the same inventors, relates to a blocking oscillator switched mode power supply for electrical equipment, in which the primary winding of a transformer in series with the currentcarrying section of an electronic switch is connected to the d-c voltage obtained by rectification of the power a-c voltage supplied via two supply terminals. A secondary winding of the transformer is provided as current supply of the electrical equipment. The power supply is, furthermore, of the type in which the control electrode of the three-electrode electronic switch is controlled by the output of a control circuit which in turn is actuated by the rectified power a-c voltage as actual value and by a set point adjuster. Also a starting circuit is provided for the further control of the control electrode of the electronic switch, and lastly the control circuit is constructed so that its current supply is provided by means of a secondary winding of the transformer. The starting circuit contains on the one hand a circuit part serving for controlling voltage generation, with following variable gain amplifier, and on the other hand a circuit part for pulse processing. The output of the variable gain amplifier as well as the output of the pulse processing system are each connected to an input of a pulse duration modulator actuating the control electrode of the electronic switch and forming the output of the control circuit. A third input of the pulse duration modulator is actuated by a current-voltage converter.
Such a blocking oscillator switched mode power supply is described for example in German patent document DE-OS No. 30 32 034 (U.S. Pat. No. 4,450,514). As additional related art may be cited "Funkschau" (1975), No. 5, p. 40-43, and the book by Wustehube et al. titled "Schaltnetzteile" (Switched Mode Power Supplies) (published 1979 in expert-Verlag, VDE-Verlag; cf. in particular p. 182 ff) as well as Siemens "Schaltnetzteile mit der IS TDA 4600" p. 7 ff.
As is known, the function of such a switched mode power supply is to supply electrical equipment, e.g. a television receiver, with stabilized and regulated operating voltages. The core of such a switched mode power supply, therefore, is a control circuit, the control element of which is constituted by the above mentioned three-electrode electronic switch, realized in particular by a bipolar power transistor. Further there is used here a high operating switching frequency and a transformer aligned to this high operating frequency. This is desirable because an extensive isolation of the electrical equipment to be supplied from the supply network is desired. Such switched mode power supplies may be laid out either according to the synchronized mode or according to the self-heterodyning mode. The present invention deals with the latter type of switched mode power supply. Such a switched mode power supply has been described also in German patent document DE-OS No. 30 32 034.
The basic circuit diagram belonging to such a switched mode power supply is illustrated in FIG. 1, which will be discussed first.
An npn power transistor serves e.g. as the control element T for the control circuit, and is connected by its emitter-collector path in series with the primary winding of a transformer Tr. Alternatively there might be used as a control element T another three-electrode electronic switching element, e.g. a thyristor or a power MOSFET. With reference to FIG. 1 in DE-OS No. 30 32 034, it can be noted that the d-c voltage operating this series connection is obtained by rectification of the a-c voltage supplied by the a-c network by means of a rectifier circuit, e.g. a Gratz circuit. In case an npn transistor is used as switch T, the emitter of this transistor is connected to the reference potential, the collector to the primary winding W.sub.P of this transformer Tr, and the other end of this primary winding to the supply potential +V.sub.s supplied by the rectifier circuit mentioned (but not shown in the drawing). The emitter-collector path of transistor T is bridged by a capacitor C.sub.s, while the capacitance C.sub.w at the primary winding W.sub.p is of a parasitic nature. The power transistor T is controlled at its base by the output part of the above mentioned control circuit, i.e. by the pulse duration modulator PDM provided therein.
A secondary winding W2 of the transformer Tr serves as sensor for the control circuit and therefore is connected by one end to said reference potential and by the other end to the input of the control circuit RS. An additional secondary winding W1 forms the actual secondary side of the blocking oscillator transformer Tr; it is provided for the actuation of the rectifier system, and the latter for the actuation of an electrical equipment R.sub.L. The d-c voltage supplied by the rectifier system GL is designated by U.sub.s for the purposes of the following exposition.
As has been indicated at the beginning, the control circuit RS consists of the output circuit part PDM which controls the transistor T and is designed as a pulse duration modulator, and of two input parts controlled by the sensor winding W.sub.2. One input part RSE serves for control voltage generation and for supplying via a control amplifier RV and control signal U.sub.A for the output part PDM. The other part IAB serves for pulse processing and supplies a signal U.sub.N to the output part PDM of the control circuit RS. Lastly there is provided a current-voltage converter SSW, which forms the actual value control of the control circuit and supplies a voltage U.sub.JP proportional to the primary current J.sub.P to the pulse duration modulator PDM. The last-named parts of the control circuit RS are also shown in the DE-OS No. 30 32 034 patent document. They belong to the control circuit illustrated in FIG. 3. The control voltage generation is effected by the resistors R5 and R4 appearing in FIGS. 1 and 2. The pulse processor IAB consists, as shown in FIG. 3 of the DE-OS document, of a zero crossing identification and the control logic actuated by it. The pulse duration modulator PDM lastly is constituted by the trigger circuit indicated in DE-OS No. 30 32 034 with the part of the control logic actuated by it.
In FIG. 2 is shown the timing diagram belonging to a circuit according to FIG. 1, that is, the time response of the signals occurring in the control circuit RS, namely U.sub.2 (=signal supplied by the transformer winding for controlling the control circuit), U.sub.N (=signal supplied by the pulse processor IAB), J.sub.P (=current supplied by the transformer winding W.sub.P in series with the switching transistor T) and U.sub.JP (=the actual-value signal supplied by the current-voltage converter SSW).
As is evident, the voltage U2 supplied by the secondary transformer winding W.sub.2 supplies with the zero crossing (U.sub.2 =0 V) the information that the energy stored in transformer Tr has been discharged and that a new charging cycle can begin, i.e. the switch constituted by transistor T can be closed. This information is communicated to the pulse duration modulator PDM via the pulse processing stage IAB. (There applies in this case: U.sub.N &lt;0 V.fwdarw.pulse start, U.sub.N &gt;0 V.fwdarw.pulse start not possible.)
Further there is obtained from the signal voltage U.sub.2 supplied by the secondary winding W.sub.2 of transformer Tr a voltage proportional to the secondary voltage U.sub.s, and via the control voltage generator RSE the control voltage U.sub.R. In the variable gain amplifier RV, the control voltage U.sub.R is compared with a reference. The difference between the signal voltage supplied to the pulse duration modulator PDM by the variable gain amplifier RV and the reference is communicated by the control output voltage U.sub.A, which is supplied by the output of the variable gain amplifier RV, to the pulse duration modulator PDM, which compares it with the signal U.sub.JP of the current-voltage converter SSW and opens the switch constituted by transistor T as soon as U.sub.JP =U.sub.A. In this manner the peak value J.sub.pmax of J.sub.P is corrected until the difference between U.sub.R and the reference voltage disappears. This means that U.sub.R and hence U.sub.s remain constant.
As has been mentioned above, FIG. 2 illustrates the most important signals of the circuit of FIG. 1. Concerning the theory, reference can be made to the cited book "Schaltnetzteile" by Wustehube. It conveys the following information: Upon load relief of the self-heterodyning blocking oscillator, the frequency must rise. Theoretically it tends toward infinity at no-load. In practice, however, it is limited at the natural frequency of the system. It is calculated from the parallel resonance of the components L.sub.p (=primary inductance) and C.sub.s //C.sub.w (cf. FIG. 1). With the natural frequency and the minimum pulse width, which is determined essentially by the properties of the switching transistor T, the minimum possible power output is established. If load relief is continued, the secondary voltage increases and accordingly also the primary voltage in the blocking phase (=voltage between emitter and collector of the transistor T), until the switch constituted by transistor T, the transformer Tr, of another part of the circuit suffers damage.
At attempt at overcoming this disadvantage of the known blocking oscillator switched mode power supplies has heretofore been achieved by simply connecting a socalled basic load, which it was important not to turn off, or a dissipative protection circuit in series with the protective capacitor C.sub.s in parallel connection with the transistor T. Such a solution, however, is uneconomical, since also in nominal operation (=operation at nominal load) power is consumed which considerably reduces the efficiency of the blocking oscillator.